Company Synopsys
Posting Date 12/7/2005
Job Location Hillsboro, OR, USA
Description Reporting to the Saber GM, The Director of Saber Marketing at Synopsys is responsible for driving all marketing and business activities for the Saber business unit. Sabers vision is that Mechatronic complexity in Automotive & Aerospace industries requires robust design and analysis, creating the opportunity to grow a very large software business. The mission is to establish Synopsys as a leading software supplier of Mechatronic System Design & Verification. Marketing responsibilities include long-term product vision, strategy, delivery, and implementation. The marketing director maintains and enhances an effective organization whose activities include promoting Synopsys' Saber product line, creating competitive and tactical marketing plan, and working closely together with Engineering and Sales. The Director will have responsibilities that include; competitive analysis, product requirements documents, product priorities, product pricing, product launch, and collateral product marketing materials.
Qualifications The ideal candidate will be a senior level software marketing executive in the automotive or aerospace industries with a successful track record of delivering growth and profitability for software products. The director will have 10 years of experience working in a variety of marketing functions to include strategy, field marketing, or marketing communications, with significant product marketing and product management experience. Exceptional communication skills are required. The ideal candidate will have an undergraduate degree in CS, EE, ME, or related discipline, an MBA would be an advantage.
Contact Sonia Mathai
Email sahuja@synopsys.com
Website www.synopsys.com

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Company Synopsys
Posting Date 12/7/2005
Job Location Hillsboro, OR, USA
Description As a primary technical contributor to the integration of the Saber HDL kernel into the Discovery AMS platform, candidate will be responsible for performing various software development tasks related to developing robust analyses, improving kernel performance and the user debug experience. Candidate is expected to instill and influence rigorous SW development and testing practices and will be expected to work closely across BUs with technical leads of other teams in order to deliver the new platform to schedule and content.
Qualifications BS in CS/EE with 9+ years of relevant experience, MS with 7+ years of relevant experience, or Ph.D. with 4+ years in programming software for operating systems, utilizing machine assembly and/or job control languages, and expert knowledge of software capabilities. The individual should have experience on development of complex software projects, familiarity with C/C++ coding, and a strong background in data structures and algorithms. It is essential that the individual has strong desires to learn and explore new technologies and are able to demonstrate good analysis and problem solving skills. Prior knowledge and experience of CAD tool development are required
Contact Sonia Mathai
Email sahuja@synopsys.com
Website www.synopsys.com

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Parsing, Code Generation, Optimization, Language Design, Debuggers, Compiler Theory
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Compiler Optimizations
Dead Code Elimination, Hoisting, Function Inlining, Loop Fusion, Code Motion, Constant Folding, ...
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Company Synopsys
Posting Date 3/29/2005
Job Location Mountain View, CA
Description The candidate will be responsible for tasks and projects in the area of verification/simulation design tools. The intern projects will involve design, development, testing in the areas of simulation. The candidate will work with the R&D team lead in executing the projects. Candidate will be responsible for his/her housing.
Qualifications Candidate should have a strong software background and have programmed in C/C++ and should have taken undergraduate/graduate courses in Compiler Design, Operating Systems, and VLSI Design. We would prefer an MS or PhD student but a well-qualified BS student would also be considered. A strong background in data structures and algorithms is required. Knowledge of EDA, verification, simulation or any HDL (such as Verilog/VHDL/SystemC) would be a big plus.
Contact Staffing Dept.
Email xnguyen@synopsys.com
Website www.synopsys.com

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Automated Compiler Performance Analysis Suite.
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Compiler Books
Parsing, Code Generation, Optimization, Language Design, Debuggers, Compiler Theory
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Compiler Optimizations
Dead Code Elimination, Hoisting, Function Inlining, Loop Fusion, Code Motion, Constant Folding, ...
compileroptimizations.com

Company Synopsys
Posting Date 9/15/2004
Job Location Durham, NC
Description This engineer will contribute to the development of core software algorithms for Hercules, Synopsys' high performance, high capacity, chip physical verification tool. The engineer will work on new and existing capabilities related to efficient disk and memory cache storage of geometric data, directory access, file management, advanced memory data structures, and APIs as some of the work will be used by multiple tools. Tasks will include specification, design, prototype, development of new software along with enhancement and maintenance of existing code. The candidate must have software design experience and the ability to produce thorough and effective design documents for large projects. The candidate should excel in solving problems individually and with other team members. This engineer must be willing to learn new areas, take ownership and pride in his/her work, and have a strong desire to contribute to the success of the product. The engineer must have strong communications skills as this position requires close work and coordination with other engineers and remote teams.
Qualifications Background in developing and maintaining large complex software systems in C or C++ on UNIX/Linux OS. Experience with file management, advanced data structures, data sorting and hashing, tree traversal, and APIs is required. Experience with geometry processing and experience with CAD software is strongly desired. Familiarity with EDA and chip design is a plus.

MS or PH.D. in Computer Science, Electrical Engineering, or Computer Engineering, or BS degree in EE/CS plus 3 years experience.

Contact Tina Shaw
Email tshaw@synopsys.com
Website www.synopsys.com

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Parsing, Code Generation, Optimization, Language Design, Debuggers, Compiler Theory
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Compiler Optimizations
Dead Code Elimination, Hoisting, Function Inlining, Loop Fusion, Code Motion, Constant Folding, ...
compileroptimizations.com

Company Synopsys
Posting Date 6/15/2004
Job Location Hillsboro, OR
Description This position is responsible for the design, implementation and maintenance of compilers for mixed-technology hardware description languages, including VHDL-AMS and MAST. The focus is on a unified compiler backend for all supported languages and includes integration of the compiler with a mixed-technology simulator, integration of compiler frontends with the backend, IR transformations, code generation, and optimizations necessary for high performance simulation. The candidate will be involved in all phases of software development including planning, problem identification, design specifications, implementation, testing, and benchmarking.
Qualifications BS in CS/EE with 10+ years of relevant experience, MS with 8+ years of relevant experience, or Ph.D. with 5+ years or relevant experience Experience in development of complex software projects Strong background in data structures and algorithms Strong desire to learn and ability to develop new techniques that push the envelope Strong expertise in object-oriented design methods Programming skills in C++ and C a must, Fortran and Tcl/Tk preferred Familiarity with modern hardware description languages and CAD tools preferred
Contact Lauren Black
Email lauren@synopsys.com
Phone 650-584-5739
Website www.synopsys.com

NULLSTONE
Automated Compiler Performance Analysis Suite.
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Parsing, Code Generation, Optimization, Language Design, Debuggers, Compiler Theory
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Compiler Optimizations
Dead Code Elimination, Hoisting, Function Inlining, Loop Fusion, Code Motion, Constant Folding, ...
compileroptimizations.com

Company Synopsys
Posting Date 6/14/2004
Job Location Hillsboro, OR, USA
Description Responsible for developing geometric processing framework for mask synthesis products and applications. Interfaces as the central resource with design, process, manufacturing, test, quality, and marketing as the product(s) move to completion and distribution. Works on extremely complex problems where analysis of situations or data requires an evaluation of intangible variance factors. Represents the organization on projects and performs in project leadership role and/or may supervise the activities of lower level personnel. Exercises independent judgment in developing methods, techniques, and evaluation criterion for obtaining results. Acts as prime consultant on large projects that effect the organizations long-term goals and objectives.
Qualifications BS with 10+ years of relevant experience, MS with 8+ years of relevant experience, or related Ph.D. with 5 years of experience developing production-level software. Experience in computational geometry, computer graphics, and/or signal/image processing is essential. The individual must have strong project planning skills including scheduling, task partitioning, and resource planning. Requires exceptional verbal, written, and interpersonal skills.
Contact Lauren Black
Email lauren@synopsys.com
Phone 650-584-5739
Website www.synopsys.com

NULLSTONE
Automated Compiler Performance Analysis Suite.
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Compiler Books
Parsing, Code Generation, Optimization, Language Design, Debuggers, Compiler Theory
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Compiler Optimizations
Dead Code Elimination, Hoisting, Function Inlining, Loop Fusion, Code Motion, Constant Folding, ...
compileroptimizations.com

Company Synopsys
Posting Date 4/4/2004
Job Location Shanghai, China
Description Responsible for designing, developing, troubleshooting and debugging of software programs for the EDA verification technology for VHDL & Verilog.The technology involves understanding of compilers and simulation tools to extend our tools capabilities. The candidate should be highly motivated, performance oriented, driven of quality and a team player. Works primarily with manager and other engineers across teams.
Qualifications BS in CS/EE with 5+ years of relevant experience or MS in CS with 2+ years or PhD in CS with 0+ year of relevant experience. Must have demonstrated strong problem solving skills, ability to work on large software systems, preferably EDA tools.A successful candidate should have strong C/C++ software development skills and a good grasp over Computer Science fundamentals, particularly data structures and design/analysis of algorithms. Knowledge of compiler development, digital design, VHDL or Verilog strong pluses. The candidate must also possess good Chinese/English communication skills. Project leadership is prefered.
Contact Fannnie Lang
Email flang@synopsys.com
Phone (8621)32204540 ext 70152
Fax (8621)52414573
Website www.synopsys.com

NULLSTONE
Automated Compiler Performance Analysis Suite.
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Compiler Books
Parsing, Code Generation, Optimization, Language Design, Debuggers, Compiler Theory
compilerbooks.com

Compiler Optimizations
Dead Code Elimination, Hoisting, Function Inlining, Loop Fusion, Code Motion, Constant Folding, ...
compileroptimizations.com

Company Synopsys
Posting Date 12/10/2003
Job Location Mountain View, CA
Description Responsible for designing, developing, troubleshooting and debugging software programs for the EDA verification technology for VHDL & Verilog. Will be involved in all phases of software development, including project planning, problem identification, design specifications, development, scheduling, implementation and testing. Will also interface with corporate applications engineers in developing project specifications and understanding customer requirements. The technology involves understanding of compilers and simulation tools to extend our tools capabilities. The candidate should be highly motivated, performance oriented, driven for quality, should have good communication skills and a team player. Works on problems of diverse scope where analysis of data requires evaluation of various factors. Assignments are given in the form of objectives. Exercises judgment within broadly defined practices and policies in selecting methods, techniques, and evaluation criteria for obtaining results. Expected to analyze project areas, refine problem descriptions, and develop novel technical solutions. Designs and implements sophisticated algorithms to solve complex problems.
Qualifications BE/B.Tech in EE/CS with 7+ years of relevant experience, ME/M.Tech with 5+ years of relevant experience, or related Ph.D. with 3+ years of experience in programming software for compiler implementation, Verilog and/or VHDL simulator and/or other EDA tools. The individual should have experience on development of complex software projects, familiarity with C/C++ coding, and a strong background in data structures and algorithms. It is essential that the individual has strong desires to learn and explore new technologies and are able to demonstrate good analysis and problem solving skills. Prior knowledge and experience of CAD tool development is required specially in the area of compilers, s/w for simulation/verification, digital design. Knowledge of Verilog is strong plus.
Email xnguyen@synopsys.com
Website www.synopsys.com

NULLSTONE
Automated Compiler Performance Analysis Suite.
nullstone.com

Compiler Books
Parsing, Code Generation, Optimization, Language Design, Debuggers, Compiler Theory
compilerbooks.com

Compiler Optimizations
Dead Code Elimination, Hoisting, Function Inlining, Loop Fusion, Code Motion, Constant Folding, ...
compileroptimizations.com