Company Nulife Semiconductor
Posting Date 5/19/2005
Job Location Chennai, Tamil Nadu, India
Description Technical management of a software team consisting of 5 to10 developers. Software architecture, design specification, implementation, quality assurance, product release and updates to customers. Responsible for project execution and on-time delivery of our high quality software tool suite.

Experience and Requirements
A minimum of 10 years in developing software tool sets for processors/micro-controllers/DSPs. Hands-on experience and proven track record in compiler, assembler, linker, loader, macros & library archives, APIs, monitor and debugger development is a must. Should have expertise in developing instruction set simulators for processors, micro-controllers and peripheral chips. An aesthetic GUI based tool development experience under all popular operating systems is also required.

Must posses an overall understanding of chip architecture, chip design flows/methodologies/tools with software/hardware concurrent co-design techniques.

Proven expertise in linking all the software tool suites to the chip development process for design verification, emulation and chip bring up activities. Expected software tool proficiency: Java, C, C++, Perl and Matlab/Simulink.

Project Management (technical) from start to end is a must. Inter personnel skills, team building and technical guidance for the team are required assets.

Should have adopted and enforced strict engineering/design practices. An ability and track record in planning and executing projects on a committed schedule is extremely important.

Qualifications MS in Computer Science/Electrical/Computer Engineering from a respected institution
Contact Dr. M.K. Srivas
Email srivas@nulifetech.com
Phone 914452040263
Fax 914452040262
Website www.nulifetech.com

NULLSTONE
Automated Compiler Performance Analysis Suite.
nullstone.com

Compiler Books
Parsing, Code Generation, Optimization, Language Design, Debuggers, Compiler Theory
compilerbooks.com

Compiler Optimizations
Dead Code Elimination, Hoisting, Function Inlining, Loop Fusion, Code Motion, Constant Folding, ...
compileroptimizations.com

Company Nulife Semiconductor
Posting Date 5/19/2005
Job Location Chennai, Tamil Nadu, India
Description Candidates should a strong CS backround. The people we are looking for should have background in compiler design and practice. It is desirable that they have had exposure in some of the following specific technical areas of compilers.
Compiler Design in General
Retargetable Compiler Design
High Level Synthesis
Familiar with Grammar Development for high level programming languages and tools like lex, yacc, ANTLR.
Intermediate Representation Languages
Compiler Optimization Algorithms and Techniques includng low-power optimizations Assembler Code Generation Scheduling Algorithms Register Allocation Algorithms Very good OO Programming Skills Java / C++ Code Profiling Techniques Processor (Assembler level) Simulation Techniques Familiar with different Processor/DSP Architectures

It is an added plus if they have been invloved in development of a commercial compilers and quality assurance of compilers.

Desirable Requirements:
Expertise in linking all the software tool suites to the chip development process for design verification, emulation, and chip bring up activities.

Expertise in scripting languages, Tcl-Tk, Java, C++ under Windows, Linux and Solaris environments are required. Matlab/ Simulink tool set exposure is preferred.

Qualifications BS or MS in Computer Science: Fresh to 3 years
Contact Dr. M.K. Srivas
Email srivas@nulifetech.com
Phone 914452040263
Fax 914452040262
Website www.nulifetech.com

NULLSTONE
Automated Compiler Performance Analysis Suite.
nullstone.com

Compiler Books
Parsing, Code Generation, Optimization, Language Design, Debuggers, Compiler Theory
compilerbooks.com

Compiler Optimizations
Dead Code Elimination, Hoisting, Function Inlining, Loop Fusion, Code Motion, Constant Folding, ...
compileroptimizations.com

Company Nulife Semiconductor
Posting Date 5/19/2005
Job Location Chennai, Tamil Nadu, India
Description Software architecture, design specification, implementation, quality assurance, product release and updates to internal chip developers and customers.

Responsible for project execution and on-time delivery of our high quality software tool suite.

A minimum of 5 years in developing software tool sets for processors, micro-controllers and DSPs. Specific development experience in compiler development, data flow graphs, resource allocation, and scheduling is required. Hands-on experience and a proven track record in compiler, assembler, linker, loader, macros/library archives and APIs are a must.

Must posses overall understanding of chip architecture, chip design flows/methodologies/tools with software/hardware concurrent co-design techniques.

Proven expertise in linking all the software tool suites to the chip development process for design verification, emulation, and chip bring up activities.

Expertise in scripting languages, Tcl-Tk, Java, C++ under Windows, Linux and Solaris environments are required. Matlab/ Simulink tool set exposure is preferred.

Should have adopted and enforced strict engineering/design practices. The ability to plan and execute projects on a committed schedule in a multi-member team environment is also a requirement.

Qualifications MS in Computer Science/Electrical/Computer Engineering from a respected institution
Contact Dr. M.K. Srivas
Email srivas@nulifetech.com
Phone 914452040263
Fax 914452040262
Website www.nulifetech.com

NULLSTONE
Automated Compiler Performance Analysis Suite.
nullstone.com

Compiler Books
Parsing, Code Generation, Optimization, Language Design, Debuggers, Compiler Theory
compilerbooks.com

Compiler Optimizations
Dead Code Elimination, Hoisting, Function Inlining, Loop Fusion, Code Motion, Constant Folding, ...
compileroptimizations.com