Company Intel
Posting Date 5/7/2007
Job Location Santa Clara, CA
Description Working with a group of people to develop and tune on Loop, Memory and Data Transformations. Performance headroom analysis for applications and benchmarks.
Qualifications 1) Compiler Optimizations, Parallelization and multi-threading experiences.
2) Familar with Linux and Windows
3) Good communication skills, Fluent in English. Good team player.
4) MS or Ph.D in Computer Science or Engineering
5) The following knowlege is a plus - OPENMP, SMT,SMP, Multi-core.
Contact John Ng
Email john.ng@intel.com
Phone (408) 653-7572
Website www.intel.com/jobs/

NULLSTONE
Automated Compiler Performance Analysis Suite.
nullstone.com

Compiler Books
Parsing, Code Generation, Optimization, Language Design, Debuggers, Compiler Theory
compilerbooks.com

Compiler Optimizations
Dead Code Elimination, Hoisting, Function Inlining, Loop Fusion, Code Motion, Constant Folding, ...
compileroptimizations.com

Company Intel
Posting Date 27 April 2007
Job Location Folsom, Ca
Description In this position, you will be joining the Graphics Engineering (GE) Fulsim team and responsible for hardware modeling of all graphics projects. The team designs and develops the 3D/2D/Media C++ pipelines. You will be working on spec definition and algorithm development with architecture team, and owning the software design and validation. This model is the primary reference for graphics and media hardware validation, both pre and post-silicon, and it's also used by the graphics driver team for driver debug and development.
Qualifications You must possess a Bachelor of Science degree or a Master of Science degree in Electrical Engineering, Computer Engineering, Computer Science or a related discipline. Additional qualifications include:
Strong C++ coding skills with practical experience in Object-Oriented programming
Strong written and verbal communication skills
Good knowledge of microprocessors and computer system architecture
Understanding of digital electronics and logic design
Good knowledge of IA-32 architecture, PC Platforms and operating systems
Excellent communication, interpersonal and problem-solving skills
Good planning and strong problem-solving skills
Knowledge in programming and debugging in IA-32 assembly language and Perl and/or Ruby*
Contact Nicole Greco
Email nicole.greco@intel.com
Phone 503-456-1993
Website www.intel.com/jobs/

NULLSTONE
Automated Compiler Performance Analysis Suite.
nullstone.com

Compiler Books
Parsing, Code Generation, Optimization, Language Design, Debuggers, Compiler Theory
compilerbooks.com

Compiler Optimizations
Dead Code Elimination, Hoisting, Function Inlining, Loop Fusion, Code Motion, Constant Folding, ...
compileroptimizations.com

Company Intel
Posting Date 27 April 2007
Job Location Austin, TX
Description Intel's Visual Computing Group is seeking an OpenGL* Device Driver Developer/3D Driver Engineer who will help us architect and implement features in our OpenGL* drivers. In this position, your responsibilities will include architecture and/or implementation of new features including an opportunity to influence the overall architecture, debugging driver issues, and performance analysis.
Qualifications You must possess a minimum of a Bachelor of Science degree in an appropriate technical discipline. Additional qualifications include:
Working experience in designing and/or developing graphics drivers for Windows* operating systems
Strong familiarity with OpenGL* (either at the application programming level or at the driver level)
Strong software development (C/C++) skills
Strong debug skills under the Windows* platform
Excellent planning, organization, presentation, and communication skills
Ability to deal with highly complex systems and apply analytical problem solving
Contact Nicole Greco
Email nicole.greco@intel.com
Phone 503-456-1993
Website www.intel.com/jobs/

NULLSTONE
Automated Compiler Performance Analysis Suite.
nullstone.com

Compiler Books
Parsing, Code Generation, Optimization, Language Design, Debuggers, Compiler Theory
compilerbooks.com

Compiler Optimizations
Dead Code Elimination, Hoisting, Function Inlining, Loop Fusion, Code Motion, Constant Folding, ...
compileroptimizations.com

Company Intel
Posting Date 27 April 2007
Job Location Folsom, Ca
Description In this position, you will be a member of the Graphics System Validation (GfxSV) team, you will be responsible for system-level validation of graphics platform components for the next generation desktop and mobile markets. Tasks include test plan and software development of feature tests used to validate Intel Graphics display functionality with respect to architecture specifications. Your responsibilities will include but not be limited to:

Evaluating pre- and post-silicon validation content and methodologies for Intel Display controller, as well as driving efficiency and coverage improvements into the graphics system validation flow and synchronize graphics hardware validation strategies with Intel Graphics driver implementation

Interacting with architecture, design, system-level simulation, platform, and BIOS engineering, as well as compatibility validation and marketing groups for a high degree of collaboration and leverage in both the pre- and post-silicon validation phases

Developing graphics validation software tools

Qualifications You should possess a Bachelor of Science degree or a Master of Science degree in Computer Science, Computer Engineering, or Electrical Engineering, with three years (one year for Masters) of experience in relevant hardware design/validation and/or software development. (Competent applicants with fewer years of experience will be considered, as will applicants with higher levels of experience). Additional qualifications include:
Solid programming skills in the Linux* or Windows* environment, and in particular: C/C++ programming languages and Perl or Ruby* scripting languages
Knowledge of BIOS, bus protocol (FSB/PCI/PCI-X*), memory subsystems, and hardware and/or software driver integration
Ability to perform under pressure and adapt to changing priorities
Excellent written and verbal communication skills
The following qualifications would be an added advantage:
Familiarity with graphics concepts and usage (VGA, 2D, 3D, execution model)
Familiarity and experience with Intel architecture and silicon debug tools (ITP*, LA*)
Experience with graphics validation (pre- or post-silicon) and/or design, including tools like software models, simulators, and emulators
Contact Nicole Greco
Email nicole.greco@intel.com
Phone 503-456-1993
Website www.intel.com/jobs/

NULLSTONE
Automated Compiler Performance Analysis Suite.
nullstone.com

Compiler Books
Parsing, Code Generation, Optimization, Language Design, Debuggers, Compiler Theory
compilerbooks.com

Compiler Optimizations
Dead Code Elimination, Hoisting, Function Inlining, Loop Fusion, Code Motion, Constant Folding, ...
compileroptimizations.com

Company Intel
Posting Date 27 April 2007
Job Location Hillsboro, Or
Description Intel's Visual Computing Group is seeking Graphics System Architects in all aspects of graphics development. This includes component architecture, micro-architecture and performance simulation development. In this position, you will be helping to drive requirements for hardware interfaces and influence the software architecture and execution direction.
Qualifications You must possess a minimum of a Bachelor of Science degree (although a Master of Science degree and a Ph.D. levels are encouraged to apply) an appropriate technical discipline. Candidates with all levels of experience are encouraged to apply and will be considered for any available opportunities. Additional qualifications include:
Working experience in developing high-performance CPU and graphics platforms
Direct previous experience with CPU and graphics product development
Experience defining micro-architecture specifications given a high-level architecture specification
Knowledge of software-hardware tuning and optimization
Knowledge of performance modeling of complex CPU and graphics architectures
Strong knowledge of current graphics architectures and implementations
Contact Nicole Greco
Email nicole.greco@intel.com
Phone 503-456-1993
Website www.intel.com/jobs/

NULLSTONE
Automated Compiler Performance Analysis Suite.
nullstone.com

Compiler Books
Parsing, Code Generation, Optimization, Language Design, Debuggers, Compiler Theory
compilerbooks.com

Compiler Optimizations
Dead Code Elimination, Hoisting, Function Inlining, Loop Fusion, Code Motion, Constant Folding, ...
compileroptimizations.com

Company Intel
Posting Date 27 April 2007
Job Location Hillsboro, Or
Description Intel's Visual Computing Group is seeking Graphics Driver Validation Architect/Engineers for components of graphics driver. This includes driver components such as Content Protection, Video/DXVA*, video codecs, image, and color processing, OpenGL*, DirectX*/Direct3D*, Video BIOS, display drives and property control pages.
Qualifications You must possess a minimum of a Bachelor of Science degree (although a Master of Science degree and a Ph.D. levels are encouraged to apply) in an appropriate technical discipline. Candidates with all levels of experience are encouraged to apply and will be considered for any available opportunities. Additional qualifications include:
Working experience in designing and/or developing and/or testing graphics drivers for Windows* operating systems
Strong knowledge of OpenGL*, DirectX*, DXVA* or display driver at the application programming level
Understanding of test methodologies
Highly technical with very good understand of one of the graphics technologies so that they can drive the creation of a comprehensive test suite to ensure the highest quality drivers
Experience with video BIOS and video display controllers would be an added advantage
Experience with Vista* operating system and TMM* specification would be an added advantage
Contact Nicole Greco
Email nicole.greco@intel.com
Phone 503-456-1993
Website www.intel.com/jobs/

NULLSTONE
Automated Compiler Performance Analysis Suite.
nullstone.com

Compiler Books
Parsing, Code Generation, Optimization, Language Design, Debuggers, Compiler Theory
compilerbooks.com

Compiler Optimizations
Dead Code Elimination, Hoisting, Function Inlining, Loop Fusion, Code Motion, Constant Folding, ...
compileroptimizations.com

Company Intel
Posting Date 27 April 2007
Job Location Hillsboro, Or
Description Intel's Visual Computing Group is seeking Graphics Driver Software Architect/Engineers in all aspects of graphics driver development. This includes driver areas such as Content Protection, Video/DXVA*, video codecs, image, and color processing, OpenGL*, DirectX*/Direct3D*, Video BIOS, engineers with expertise in developing an operating system, property control page engineers, display driver engineers, and simulation environment development.
Qualifications You must possess a minimum of a Bachelor of Science degree (although a Master of Science degree and a Ph.D. levels are encouraged to apply) in an appropriate technical discipline. Candidates with all levels of experience are encouraged to apply and will be considered for any available opportunities. Additional qualifications include:
Working experience in designing and/or developing graphics drivers for Windows* operating systems
Strong knowledge of OpenGL*, DirectX*, DXVA* or display driver
Experience with video BIOS and video display controllers would be an added advantage
Experience with Vista* operating system and TMM* specification would be an added advantage
Contact Nicole Greco
Email nicole.greco@intel.com
Phone 503-456-1993
Website www.intel.com/jobs/

NULLSTONE
Automated Compiler Performance Analysis Suite.
nullstone.com

Compiler Books
Parsing, Code Generation, Optimization, Language Design, Debuggers, Compiler Theory
compilerbooks.com

Compiler Optimizations
Dead Code Elimination, Hoisting, Function Inlining, Loop Fusion, Code Motion, Constant Folding, ...
compileroptimizations.com

Company Intel
Posting Date 27 April 2007
Job Location Folsom, Ca
Description Intel's Visual Computing Group is seeking Front-End Development Engineer for micro-architecture definition, RTL, and pre-silicon design verification.
Qualifications You must possess a minimum of a Bachelor of Science degree (although a Master of Science degree and a Ph.D. levels are encouraged to apply) in an appropriate technical discipline. Candidates with all levels of experience are encouraged to apply and will be considered for any available opportunities. Additional qualifications include:
Experience with Specman*
Experience in analog and mixed signal verification and/or validation
Strong familiarity with general computer architecture and x86 ISA
DFTV (Design for test/debug/manufacture) experience
Experience with industry standard RTL and behavioral modeling tools, software and FPGA based simulation
Theory and practice of logic design verification including dynamic and formal methods
Track record of supporting successful designs in high volume manufacture
Strong collaboration and customer orientation skills
Ability to work with geographically dispersed team
Contact Nicole Greco
Email nicole.greco@intel.com
Phone 503-456-1993
Website www.intel.com/jobs/

NULLSTONE
Automated Compiler Performance Analysis Suite.
nullstone.com

Compiler Books
Parsing, Code Generation, Optimization, Language Design, Debuggers, Compiler Theory
compilerbooks.com

Compiler Optimizations
Dead Code Elimination, Hoisting, Function Inlining, Loop Fusion, Code Motion, Constant Folding, ...
compileroptimizations.com

Company Intel
Posting Date 27 April 2007
Job Location Hillsboro, Or
Description Intel's Visual Computing Group (VCG) is seeking CMOS Design Automation Engineers for implementation of Synthesis, APR, back-end design verification and optimization, RAM and register file compilers, front-end development and verification flows.
Qualifications You must possess at least a Bachelor of Science degree (a Master of Science degree and a Ph.D. holders are also encouraged to apply). Additional qualifications include:
Experience in analog circuit design and analysis
Experience in the use of digital design and/or analysis tools including circuit simulators, dynamic and/or static timing analysis, synthesis, and APR
Strong scripting skills in Perl, TCL, or other scripting languages
Experience in the development of flows and methodology to support > 2 GHz design
Track record of supporting successful designs in high-volume manufacture
Collaboration and customer orientation skills
Ability to work with geographically dispersed team
Contact Nicole Greco
Email nicole.greco@intel.com
Phone 503-456-1993
Fax
Website www.intel.com/jobs/

NULLSTONE
Automated Compiler Performance Analysis Suite.
nullstone.com

Compiler Books
Parsing, Code Generation, Optimization, Language Design, Debuggers, Compiler Theory
compilerbooks.com

Compiler Optimizations
Dead Code Elimination, Hoisting, Function Inlining, Loop Fusion, Code Motion, Constant Folding, ...
compileroptimizations.com

Company Intel
Posting Date 27 April 2007
Job Location Folsom, Ca
Description Intel's Visual Computing Group is seeking CMOS Digital Circuit Designers for development of SRAM, ROM, PLA, register file, and high speed arithmetic circuits, as well as cell based blocks of > 500K gates from RTL level description.
Qualifications You must possess a minimum of a Bachelor of Science degree (although a Master of Science degree and a Ph.D. levels are encouraged to apply) in an appropriate technical discipline. Candidates with all levels of experience are encouraged to apply and will be considered for any available opportunities. Any relevant amount of experience in digital circuit design and analysis is required. Additional qualifications include:
Experience in digital design/analysis tools including circuit simulators, dynamic and/or static timing analysis, power estimation, synthesis and APR
Strong background in > 2 GHz digital design
Strong scripting skills in Perl, TCL, or other scripting languages
Track record of successful designs in high volume manufacture
Strong collaboration skills
Ability to work with geographically dispersed team
Contact Nicole Greco
Email nicole.greco@intel.com
Phone 503-456-1993
Fax
Website www.intel.com/jobs/

NULLSTONE
Automated Compiler Performance Analysis Suite.
nullstone.com

Compiler Books
Parsing, Code Generation, Optimization, Language Design, Debuggers, Compiler Theory
compilerbooks.com

Compiler Optimizations
Dead Code Elimination, Hoisting, Function Inlining, Loop Fusion, Code Motion, Constant Folding, ...
compileroptimizations.com

Company Intel
Posting Date 27 April 2007
Job Location Hillsboro, Or
Description Intel's Visual Computing Group is seeking CMOS Analog Design Engineers for development of high speed interfaces including architecture, design and analysis of PLLs, PCIE-genX* design, Graphics DDR genX* and display/video interfaces.
Qualifications You must possess a minimum of a Bachelor of Science degree (although a Master of Science degree and a Ph.D. levels are encouraged to apply) in an appropriate technical discipline. Candidates with all levels of experience are encouraged to apply and will be considered for any available opportunities. Any relevant amount of experience in analog circuit design and analysis is required. Additional qualifications include:
Experience in analog design/analysis tools including RF simulators and Matlab*
Strong background in high speed serial interfaces (2.5Gb/s is preferred)
Experience writing Micro-Architecture Specifications (MAS), including initial block- level architectures and detailed electrical specifications
Experience with High Speed I/O, VLSI Circuit layout, and PLL circuits
Experience in integrating complex analog blocks in baseline digital process technologies to meet high-volume manufacturing quality standards
Track record of successful analog designs in high volume manufacture
Strong collaboration skills
Ability to work with geographically dispersed team
Contact Nicole Greco
Email nicole.greco@intel.com
Phone 503-456-1993
Fax
Website www.intel.com/jobs/

NULLSTONE
Automated Compiler Performance Analysis Suite.
nullstone.com

Compiler Books
Parsing, Code Generation, Optimization, Language Design, Debuggers, Compiler Theory
compilerbooks.com

Compiler Optimizations
Dead Code Elimination, Hoisting, Function Inlining, Loop Fusion, Code Motion, Constant Folding, ...
compileroptimizations.com

Company Intel
Posting Date 12/7/2005
Job Location Shanghai, P.R.China
Description As an Intel software engineering manager in the embedded platform compiler and tools group, you will provide expertise, supervision and leadership. You will manage cross-geo teams for tools products. Candidates should have a proven track record of cross-group collaboration (onshore and offshore), the ability to work effectively with individuals at all levels, excellent communication skills, and technical leadership. Candidates should have the ability in monitoring and tracking components/tools with inter-dependency for on-time product delivery.

Responsibilities include the following:
Provides supervision, training, technical direction and guidance.
Selects, trains, and develops monitors, appraises, and promotes a qualified staff.
Works with team leads to establish schedules that ensure tasks are completed as scheduled and budgeted.
Maintains a working knowledge of software engineering and software development processes, trends and direction.
Works with other stakeholders to plan, establish, and maintain current and future software development policies, procedures, standards, and methodologies.

Qualifications You must possess a CS or M.S. degree in Computer Science and have at least 10+ years experience in managing projects in a commercial high tech environment. Experience in tools (linker, assembler, debugger, profiler, IDE) development, performance tuning, and big application optimization is a must. The successful candidate must have strong management and communication skills and a proven track record of lead software products. The position requires strong verbal and written skills, and excellent leadership and organizational skills. Experience with an entire product life cycle from definition through software development, design, implementation, quality assurance, release as well as experience in influencing and guiding an organization in adopting new processes and practices is required. Must be creative, performance oriented, and have a strong desire to ensure customer satisfaction at all levels.

You must have demonstrated experience and proficiency leading and managing a highly technical staff. Must possess demonstrated subject matter expertise with proven hands-on experience in all phases of the software development lifecycle. Prior experience developing system software for network and communication industry a plus. Advanced C/C++, Java, Windows, Linux, QNX, CVS and ClearQuest experience is preferred.

Contact Lai-wah Hui
Email lai-wah.hui@intel.com
Phone (978) 553-4860
Fax
Website www.intel.com/jobs/

NULLSTONE
Automated Compiler Performance Analysis Suite.
nullstone.com

Compiler Books
Parsing, Code Generation, Optimization, Language Design, Debuggers, Compiler Theory
compilerbooks.com

Compiler Optimizations
Dead Code Elimination, Hoisting, Function Inlining, Loop Fusion, Code Motion, Constant Folding, ...
compileroptimizations.com

Company Intel
Posting Date 10/11/2005
Job Location Shanghai, P.R.China
Description As a QA software manager in the embedded platform compiler and tools group, you will provide expertise, supervision and leadership. You will manage a China QA team for compiler and tools products. Candidates should have a proven track record of managing QA team for Compiler and tools product. He/She had experience in cross-group collaboration (onshore and offshore), the ability to work effectively with individuals at all levels, excellent communication skills both in Chinese and English, and technical leadership in test methodology. Candidates should have the ability in monitoring and tracking components/tools quality with inter-dependency for on-time product delivery.

Responsibilities include the following:
Provides supervision, training, technical direction and guidance.
Selects, trains, and develops, monitors, appraises, and promotes a qualified staff.
Works with team leads to establish schedules that ensure tasks are completed as scheduled and budgeted.
Maintains a working knowledge of QA software engineering and software development processes, trends and direction.
Works with other stakeholders to plan, establish, and maintain current and future QA software development policies, procedures, standards, and methodologies.

Qualifications Education:
Bachelor's Degree/15+ years or Master's Degree/10+ years, or Ph.D. Degree/8+ years

Experience:
Candidates must have strong QA management skills to be able to bring the current team to the next level. Compiler and tools QA skills are a must; ideally in embedded platforms. A successful candidate must have a proven track record of significant contribution to a successful commercial compiler product. Experience with an entire product life cycle from definition through software development, design, implementation, quality assurance, release is required. Advanced C/C++, Perl, Python, Java, Windows, Linux, QNX, CVS and ClearQuest experience is preferred.

Excellent written and oral communication skills in Chinese and English are a must. Experience in CMM or ISO9000 is a plus. Must be creative, performance oriented, and have a strong desire to ensure customer satisfaction at all levels. Candidates must have demonstrated experience and proficiency leading and managing a highly technical staff. Must possess demonstrated subject matter expertise with proven hands-on experience in all phases of the software development lifecycle.

Contact Debin Yang or Julian Horn
Email julian.c.horn@intel.com
Fax
Website www.intel.com/jobs/

NULLSTONE
Automated Compiler Performance Analysis Suite.
nullstone.com

Compiler Books
Parsing, Code Generation, Optimization, Language Design, Debuggers, Compiler Theory
compilerbooks.com

Compiler Optimizations
Dead Code Elimination, Hoisting, Function Inlining, Loop Fusion, Code Motion, Constant Folding, ...
compileroptimizations.com

Company Intel
Posting Date 8/26/2005
Job Location Santa Clara, California, USA
Description The Programming Systems Lab at the Intel Microprocessor Technology Lab (MTL) has full-time research openings for positions working on compilers, runtime systems and programming environments for multi-core systems. The candidate will join a research team involved in the design and implementation of a highly scalable programming environment, with particular emphasis on language and runtime features to ease parallel programming.

We seek creative, risk-taking candidates with a strong background in one or more of the following areas: runtime systems, static or dynamic compilation, language implementation, program analysis, hardware-software interfaces, and software-based power/energy management. We expect the candidate to contribute innovative research ideas, help define the research agenda, implement the research ideas in high-performance systems, and start new projects. The candidate must be a good team player. Please send resumes to allan.knies@intel.com

Qualifications - Ph.D. in Computer Science or equivalent research experience.
- Experience in one or more of the following: Language design and implementation, runtime systems, compilers, operating systems, database systems, hardware-software co-design.
- Publications in top-tier research conferences and journals.
- Excellent implementation skills.
- Good understanding of processor architecture.
Contact Allan Knies
Email allan.knies@intel.com
Fax
Website www.intel.com/jobs/

NULLSTONE
Automated Compiler Performance Analysis Suite.
nullstone.com

Compiler Books
Parsing, Code Generation, Optimization, Language Design, Debuggers, Compiler Theory
compilerbooks.com

Compiler Optimizations
Dead Code Elimination, Hoisting, Function Inlining, Loop Fusion, Code Motion, Constant Folding, ...
compileroptimizations.com

Company Intel
Posting Date 7/29/2005
Job Location Western Region, US
Description Intel Solution Services is Intel Corporation's worldwide professional services organization, helping companies capitalize on the full value of Intel architecture through consulting focused on architecture transitions. More information on ISS is available at http://www.intel.com/go/intelsolutionservices.

In this position, you will be delivering customer projects that promote and drive Intel Technology transitions and overall adoption of Intel architecture in various industries. The position is on the Americas - Western Region Application Platform and Migration (APM) Practice Team. The APM Team delivers services for migration, solution architecture and design, performance tuning and scaling of applications running on Intel architecture in high performance computing environments and GRID solutions. Your responsibilities will include but not be limited to:
- Engaging and influencing senior technology management and IT executives to identify new opportunities and executing on solutions
- Conducting technical assessments and defining project scope and specifications
- Interfacing with and working collaboratively with project managers, peer consultants, internal teams, field/sales teams, fellows travelers, and third parties
- Timely delivering technical solutions

Qualifications You should possess a Master's degree or a Bachelor's degree in Computer Science, Computer Engineering or Electrical Engineering with a strong background in system and/or software development and professional consulting experience of at least seven to ten years. Your technical experience and skills should include many of the following:


- In-depth knowledge of Microsoft* Windows* and/or Linux* environments and system administration experience
- Strong software architecture and development experience in C/C++, Fortran*, and/or Java*
- In-depth knowledge of system architectures (Intel architecture would be an added advantage) and compilers for code performance optimization
- Knowledge of system and hardware architecture
- Experience with High Performance Computing, parallel code optimization, cluster design/implementation/performance optimization
- Knowledge of enterprise multi-tiered applications, server-client applications, web technologies, backend storage
- Experience with code profiling, analysis and performance optimization tools, such as VTune*, JProbe, OptimizeIt
- Experience with code porting across platforms - Performance tuning of code, applications, and operating systems for Intel architecture, including familiarity with load testing and analyzer tools
- Experience with performance testing and scaling of large enterprise applications a plus

Other requirements:
- Relevant certifications would be added advantages
- Ability to perform significant travel and onsite customer work
- Experience in leading diverse technical staff
- Strong verbal and written communications and presentation skills

Contact Allan Knies
Email allan.knies@intel.com
Fax
Website www.intel.com/jobs/

NULLSTONE
Automated Compiler Performance Analysis Suite.
nullstone.com

Compiler Books
Parsing, Code Generation, Optimization, Language Design, Debuggers, Compiler Theory
compilerbooks.com

Compiler Optimizations
Dead Code Elimination, Hoisting, Function Inlining, Loop Fusion, Code Motion, Constant Folding, ...
compileroptimizations.com

Company Intel
Posting Date 5/27/2005
Job Location Santa Clara, CA
Description Participate in the research, design, and development of domain-specific languages and compilation for many-core IA architectures. Many-core architectures have presented great challenges to the programmability of such architectures. There have been limited success in designing and deploying general-purpose parallel programming languages. Our current focus is on domain-specific parallel languages and programming systems. The position includes work on understanding applications (e.g. media, graphics, packet processing, or data mining), designing advanced domain-specific language features, and constructing a programming system which can produce efficient, scalable, and reliable code on many-core platforms.

(req# 479392)

Qualifications Ph.D. in Computer Science, Computer Engineering, or a related field is preferred. Experiences on language design and compiler construction. Knowledges on parallel computer architectures. Experiences in any of the application domains, such as media, graphics, packet processing, and data mining, is a plus.
Contact Allan Knies
Email allan.knies@intel.com
Fax
Website www.intel.com/jobs/

NULLSTONE
Automated Compiler Performance Analysis Suite.
nullstone.com

Compiler Books
Parsing, Code Generation, Optimization, Language Design, Debuggers, Compiler Theory
compilerbooks.com

Compiler Optimizations
Dead Code Elimination, Hoisting, Function Inlining, Loop Fusion, Code Motion, Constant Folding, ...
compileroptimizations.com

Company Intel
Posting Date 5/27/2005
Job Location Santa Clara, CA or Hudson, MA
Description As a Compiler manager in the embedded platform compiler and tools group, you will provide expertise, supervision and leadership. You will manage cross-geo teams for compiler and tools products. Candidates should have a proven track record of cross-group collaboration (onshore and offshore), the ability to work effectively with individuals at all levels, excellent communication skills, compiler development, performance tuning and technical leadership. Candidates should have the ability in monitoring and tracking components/tools with inter-dependency for on-time product delivery.

Responsibilities include the following:
61 Provides supervision, training, technical direction and guidance.
61 Selects, trains, and develops, monitors, appraises, and promotes a qualified staff.
61 Works with team leads to establish schedules that ensure tasks are completed as scheduled and budgeted.
61 Maintains a working knowledge of software engineering and software development processes, trends and direction.
61 Works with other stakeholders to plan, establish, and maintain current and future software development policies, procedures, standards, and methodologies.

Qualifications Education: Bachelor's Degree/20+ years or Master's Degree/15+ years, or Ph.D. Degree/10+ years

Experience: Candidates must have strong management skills to be able to bring the current team to the next level. Compiler internal and tools skills a must; ideally in embedded platforms. A successful candidate must have a proven track record of significant contribution to a successful commercial compiler product. Experience with an entire product life cycle from definition through software development, design, implementation, quality assurance, release is required.

Excellent written and oral communication skills are a must. Must be creative, performance oriented, and have a strong desire to ensure customer satisfaction at all levels. Must have demonstrated experience and proficiency leading and managing a highly technical staff. Must possess demonstrated subject matter expertise with proven hands-on experience in all phases of the software development lifecycle.

Contact I-Yu Chen
Email i-yu.chen@intel.com
Phone (978)553-5318
Fax
Website www.intel.com/jobs/

NULLSTONE
Automated Compiler Performance Analysis Suite.
nullstone.com

Compiler Books
Parsing, Code Generation, Optimization, Language Design, Debuggers, Compiler Theory
compilerbooks.com

Compiler Optimizations
Dead Code Elimination, Hoisting, Function Inlining, Loop Fusion, Code Motion, Constant Folding, ...
compileroptimizations.com

Company Intel
Posting Date 5/27/2005
Job Location Santa Clara, CA, USA
Description 1. A full-time regular job.
2. Develop the state-of-the-art optimizing and parallelzing compiler for SMT, Multicore, SMP architectures.
3. Work with team members on performance analysis and tuning
Qualifications 1) Compiler optimizations, parallelization, and multithreading experiences
2) Has some knowledge of Intel Architectures (IPF and x86) would be a plus
3) Excellent software engineering skills
4) Familiar with Linux and Windows
5) Fluent in English, good communication skills, a good team player
6) MS or Ph.D. degree with major in computer science or computer engineering.
Contact Xinmin Tian
Email Xinmin.Tian@intel.com
Phone (408) 765-3424
Fax
Website www.intel.com/jobs/

NULLSTONE
Automated Compiler Performance Analysis Suite.
nullstone.com

Compiler Books
Parsing, Code Generation, Optimization, Language Design, Debuggers, Compiler Theory
compilerbooks.com

Compiler Optimizations
Dead Code Elimination, Hoisting, Function Inlining, Loop Fusion, Code Motion, Constant Folding, ...
compileroptimizations.com

Company Intel
Posting Date 5/27/2005
Job Location Shanghai, China
Description Work to create the next generation of compiler products for network and communication software. You will work on architecting, designing, implementing and testing our compiler software products.
Qualifications This position requires a BS, MS or Ph.D. in computer science with 10+ years of experience in development, quality assurance and the delivery of compilers. You must also possess:
- Technical leadership skills
- Excellent English and Chinese communication skills
- Solid knowledge of compiler front end, optimization and back end technology, and assembly and C/C++ programming languages
- Good debugging skills and an understanding of the software development life cycle
- The ability to work in a team environment
- Familiarity with embedded operating systems, Microsoft* Windows and Linux (desired)
Contact Yingwei Zhang
Email yingwei.zhang@intel.com
Fax
Website www.intel.com/jobs/

NULLSTONE
Automated Compiler Performance Analysis Suite.
nullstone.com

Compiler Books
Parsing, Code Generation, Optimization, Language Design, Debuggers, Compiler Theory
compilerbooks.com

Compiler Optimizations
Dead Code Elimination, Hoisting, Function Inlining, Loop Fusion, Code Motion, Constant Folding, ...
compileroptimizations.com